7dB optical power budget improvements of 11.25Gb/s optical OFDM PON systems using optical filters

Wavelength offset super Gaussian optical filters enable 7dB increases in optical power budget of 11.25Gb/s optical OFDM PON systems using directly modulated DFBs, considerably relax filter bandwidth requirement and improve performance robustness to bandwidth variation. © 2011 Optical Society of America.

7dB optical power budget improvements of optical OFDM PON systems using narrow optical filters

The use of 0.02nm bandwidth optical bandpass filters with 0.01nm wavelength offsets from optical carrier wavelengths in the optical OFDM (OOFDM) transmitter improves optical power budgets by 7dB at a total channel BER of 1×10 -3 in directly modulated laser-based IMDD PON systems. ©2010 Optical Society of America.

Impact of longitudinal power budget in coherent transmission systems employing digital back-propagation

We report the impact of longitudinal signal power profile on the transmission performance of coherently-detected 112 Gb/s m-ary polarization multiplexed quadrature amplitude modulation system after compensation of deterministic nonlinear fibre impairments. Performance improvements up to 0.6 dB (Q(eff)) are reported for a non-uniform transmission link power profile. Further investigation reveals that the evolution of the transmission performance with power profile management is fully consistent with the parametric amplification of the amplified spontaneous emission by the signal through four-wave mixing. In particular, for a non-dispersion managed system, a single-step increment of 4 dB in the amplifier gain, with respect to a uniform gain profile, at similar to 2/3(rd) of the total reach considerably improves the transmission performance for all the formats studied. In contrary a negative-step profile, emulating a failure (gain decrease or loss increase), significantly degrades the bit-error rate.

Theory of optimal power budget in quasi-linear dispersion-managed fibre links

A theory of an optimal distribution of the gain of in-line amplifiers in dispersion-managed transmission systems is developed. As an example of the application of the general method, a design of the line with periodically imbalanced in-line amplification is proposed.

Optimal power budget in quasi-linear dispersion-managed fiber links

We develop a theory of an optimal distribution of the gain of in-line amplifiers in dispersion-managed transmission systems. As an example of the application of the general method we propose a design of the line with periodically imbalanced in-line amplification.

Impact of longitudinal power budget in coherent transmission systems employing digital back-propagation

We report the impact of longitudinal signal power profile on the transmission performance of coherently-detected 112 Gb/s m-ary polarization multiplexed quadrature amplitude modulation system after compensation of deterministic nonlinear fibre impairments. Performance improvements up to 0.6 dB (Q(eff)) are reported for a non-uniform transmission link power profile. Further investigation reveals that the evolution of the transmission performance with power profile management is fully consistent with the parametric amplification of the amplified spontaneous emission by the signal through four-wave mixing. In particular, for a non-dispersion managed system, a single-step increment of 4 dB in the amplifier gain, with respect to a uniform gain profile, at similar to 2/3(rd) of the total reach considerably improves the transmission performance for all the formats studied. In contrary a negative-step profile, emulating a failure (gain decrease or loss increase), significantly degrades the bit-error rate.

Process variability-aware statistical hybrid modeling of dynamic power dissipation in 65 nm CMOS designs

A generalized technique is proposed for modeling the effects of process variations on dynamic power by directly relating the variations in process parameters to variations in dynamic power of a digital circuit. The dynamic power of a 2-input NAND gate is characterized by mixed-mode simulations, to be used as a library element for 65mn gate length technology. The proposed methodology is demonstrated with a multiplier circuit built using the NAND gate library, by characterizing its dynamic power through Monte Carlo analysis. The statistical technique of Response. Surface Methodology (RSM) using Design of Experiments (DOE) and Least Squares Method (LSM), are employed to generate a "hybrid model" for gate power to account for simultaneous variations in multiple process parameters. We demonstrate that our hybrid model based statistical design approach results in considerable savings in the power budget of low power CMOS designs with an error of less than 1%, with significant reductions in uncertainty by atleast 6X on a normalized basis, against worst case design.

Significant improvements in optical power budgets of real-time optical OFDM PON systems.

Based on a comprehensive theoretical optical orthogonal frequency division multiplexing (OOFDM) system model rigorously verified by comparing numerical results with end-to-end real-time experimental measurements at 11.25Gb/s, detailed explorations are undertaken, for the first time, of the impacts of various physical factors on the OOFDM system performance over directly modulated DFB laser (DML)-based, intensity modulation and direct detection (IMDD), single-mode fibre (SMF) systems without in-line optical amplification and chromatic dispersion compensation. It is shown that the low extinction ratio (ER) of the DML modulated OOFDM signal is the predominant factor limiting the maximum achievable optical power budget, and the subcarrier intermixing effect associated with square-law photon detection in the receiver reduces the optical power budget by at least 1dB. Results also indicate that, immediately after the DML in the transmitter, the insertion of a 0.02nm bandwidth optical Gaussian bandpass filter with a 0.01nm wavelength offset with respect to the optical carrier wavelength can enhance the OOFDM signal ER by approximately 1.24dB, thus resulting in a 7dB optical power budget improvement at a total channel BER of 1 × 10(-3).

Performance and power dissipation comparisons between 28 Gb/s NRZ, PAM, CAP and optical OFDM systems for data communication applications

Theoretical investigations have been carried out to analyze and compare the link power budget and power dissipation of non-return-to-zero (NRZ), pulse amplitude modulation-4 (PAM-4), carrierless amplitude and phase modulation-16 (CAP-16) and 16-quadrature amplitude modulation-orthogonal frequency division multiplexing (16-QAM-OFDM) systems for data center interconnect scenarios. It is shown that for multimode fiber (MMF) links, NRZ modulation schemes with electronic equalization offer the best link power budget margins with the least power dissipation for short transmission distances up to 200 m; while OOFDM is the only scheme which can support a distance of 300 m albeit with power dissipation as high as 4 times that of NRZ. For short single mode fiber (SMF) links, all the modulation schemes offer similar link power budget margins for fiber lengths up to 15 km, but NRZ and PAM-4 are preferable due to their system simplicity and low power consumption. For lengths of up to 30 km, CAP-16 and OOFDM are required although the schemes consume 2 and 4 times as much power respectively compared to that of NRZ. OOFDM alone allows link operation up to 35 km distances. © 1983-2012 IEEE.

Low power predictable memory and processing architectures

Great demand in power optimized devices shows promising economic potential and draws lots of attention in industry and research area. Due to the continuously shrinking CMOS process, not only dynamic power but also static power has emerged as a big concern in power reduction. Other than power optimization, average-case power estimation is quite significant for power budget allocation but also challenging in terms of time and effort. In this thesis, we will introduce a methodology to support modular quantitative analysis in order to estimate average power of circuits, on the basis of two concepts named Random Bag Preserving and Linear Compositionality. It can shorten simulation time and sustain high accuracy, resulting in increasing the feasibility of power estimation of big systems. For power saving, firstly, we take advantages of the low power characteristic of adiabatic logic and asynchronous logic to achieve ultra-low dynamic and static power. We will propose two memory cells, which could run in adiabatic and non-adiabatic mode. About 90% dynamic power can be saved in adiabatic mode when compared to other up-to-date designs. About 90% leakage power is saved. Secondly, a novel logic, named Asynchronous Charge Sharing Logic (ACSL), will be introduced. The realization of completion detection is simplified considerably. Not just the power reduction improvement, ACSL brings another promising feature in average power estimation called data-independency where this characteristic would make power estimation effortless and be meaningful for modular quantitative average case analysis. Finally, a new asynchronous Arithmetic Logic Unit (ALU) with a ripple carry adder implemented using the logically reversible/bidirectional characteristic exhibiting ultra-low power dissipation with sub-threshold region operating point will be presented. The proposed adder is able to operate multi-functionally.

Power Efficient DSP Datapath Configuration Methodology for FPGA

Exploiting the underutilisation of variable-length DSP algorithms during normal operation is vital, when seeking to maximise the achievable functionality of an application within peak power budget. A system level, low power design methodology for FPGA-based, variable length DSP IP cores is presented. Algorithmic commonality is identified and resources mapped with a configurable datapath, to increase achievable functionality. It is applied to a digital receiver application where a 100% increase in operational capacity is achieved in certain modes without significant power or area budget increases. Measured results show resulting architectures requires 19% less peak power, 33% fewer multipliers and 12% fewer slices than existing architectures.

Performance Limits of MIMO Systems with Nonlinear Power Amplifiers

The development of 5G enabling technologies brings new challenges to the design of power amplifiers (PAs). In particular, there is a strong demand for low-cost, nonlinear PAs which, however, introduce nonlinear distortions. On the other hand, contemporary expensive PAs show great power efficiency in their nonlinear region. Inspired by this trade-off between nonlinearity distortions and efficiency, finding an optimal operating point is highly desirable. Hence, it is first necessary to fully understand how and how much the performance of multiple-input multiple-output (MIMO) systems deteriorates with PA nonlinearities. In this paper, we first reduce the ergodic achievable rate (EAR) optimization from a power allocation to a power control problem with only one optimization variable, i.e. total input power. Then, we develop a closed-form expression for the EAR, where this variable is fixed. Since this expression is intractable for further analysis, two simple lower bounds and one upper bound are proposed. These bounds enable us to find the best input power and approach the channel capacity. Finally, our simulation results evaluate the EAR of MIMO channels in the presence of nonlinearities. An important observation is that the MIMO performance can be significantly degraded if we utilize the whole power budget.

Secure Transmission in Cooperative Networks with Weak Eavesdroppers

In this letter, we propose a scheme to improve the secrecy rate of cooperative networks using Analog Network Coding (ANC). ANC mixes the signals in the air; the desired signal is then separated out, from the mixed signals, at the legitimate receiver using techniques like self interference subtraction and signal nulling, thereby achieving better secrecy rates. Assuming global channel state information, memoryless adversaries and the decode-and-forward strategy, we seek to maximize the average secrecy rate between the source and the destination, subject to an overall power budget. Then, exploiting the structure of the optimization problem, we compute its optimal solution. Finally, we use numerical evaluations to compare our scheme with the conventional approaches.

Dense, efficient chip-to-chip communication at the extremes of computing

The scalability of CMOS technology has driven computation into a diverse range of applications across the power consumption, performance and size spectra. Communication is a necessary adjunct to computation, and whether this is to push data from node-to-node in a high-performance computing cluster or from the receiver of wireless link to a neural stimulator in a biomedical implant, interconnect can take up a significant portion of the overall system power budget. Although a single interconnect methodology cannot address such a broad range of systems efficiently, there are a number of key design concepts that enable good interconnect design in the age of highly-scaled CMOS: an emphasis on highly-digital approaches to solving ‘analog’ problems, hardware sharing between links as well as between different functions (such as equalization and synchronization) in the same link, and adaptive hardware that changes its operating parameters to mitigate not only variation in the fabrication of the link, but also link conditions that change over time. These concepts are demonstrated through the use of two design examples, at the extremes of the power and performance spectra.

A novel all-digital clock and data recovery technique for high-performance, high density interconnect has been developed. Two independently adjustable clock phases are generated from a delay line calibrated to 2 UI. One clock phase is placed in the middle of the eye to recover the data, while the other is swept across the delay line. The samples produced by the two clocks are compared to generate eye information, which is used to determine the best phase for data recovery. The functions of the two clocks are swapped after the data phase is updated; this ping-pong action allows an infinite delay range without the use of a PLL or DLL. The scheme's generalized sampling and retiming architecture is used in a sharing technique that saves power and area in high-density interconnect. The eye information generated is also useful for tuning an adaptive equalizer, circumventing the need for dedicated adaptation hardware.

On the other side of the performance/power spectra, a capacitive proximity interconnect has been developed to support 3D integration of biomedical implants. In order to integrate more functionality while staying within size limits, implant electronics can be embedded onto a foldable parylene (‘origami’) substrate. Many of the ICs in an origami implant will be placed face-to-face with each other, so wireless proximity interconnect can be used to increase communication density while decreasing implant size, as well as facilitate a modular approach to implant design, where pre-fabricated parylene-and-IC modules are assembled together on-demand to make custom implants. Such an interconnect needs to be able to sense and adapt to changes in alignment. The proposed array uses a TDC-like structure to realize both communication and alignment sensing within the same set of plates, increasing communication density and eliminating the need to infer link quality from a separate alignment block. In order to distinguish the communication plates from the nearby ground plane, a stimulus is applied to the transmitter plate, which is rectified at the receiver to bias a delay generation block. This delay is in turn converted into a digital word using a TDC, providing alignment information.